Technical Document
Specifications
Mounting Type
Surface Mount
Package Type
QFN
Pin Count
24
Dimensions
4 x 4 x 0.85mm
Length
4mm
Height
0.85mm
Maximum Operating Supply Voltage
3.63 V
Width
4mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Country of Origin
Taiwan, Province Of China
Product details
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.
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€ 25.18
Each (Supplied in a Tray) (ex VAT)
€ 29.96
Each (Supplied in a Tray) (inc VAT)
1
€ 25.18
Each (Supplied in a Tray) (ex VAT)
€ 29.96
Each (Supplied in a Tray) (inc VAT)
1
Buy in bulk
quantity | Unit price |
---|---|
1 - 24 | € 25.18 |
25 - 99 | € 24.83 |
100 - 499 | € 24.60 |
500 - 999 | € 24.30 |
1000+ | € 24.05 |
Technical Document
Specifications
Mounting Type
Surface Mount
Package Type
QFN
Pin Count
24
Dimensions
4 x 4 x 0.85mm
Length
4mm
Height
0.85mm
Maximum Operating Supply Voltage
3.63 V
Width
4mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Country of Origin
Taiwan, Province Of China
Product details
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.