Technical Document
Specifications
Product details
JTAG-HS3 FPGA Programming Cable
The JTAG-HS3 programming cable allows high-speed programming/debugging of Xilinx FPGA and SoC devices from a host PC.
Features
Separate Vref drives JTAG signal voltages
Vref can be any voltage between +1.8V and +5V
USB 2.0 HS port drives JTAG bus at up to 30Mbit/sec
Compatible with Xilinx ISE 14.1 and newer
Compatible with Xilinx Vivado 2013.3 and newer
PC connector: MicroUSB
JTAG connector: 2 x 7-pin 2mm
Open-drain buffer on pin 14 allows processor reset of Xilinx Zynq platform
Supported Target Devices
Xilinx FPGAs
Xilinx Zynq-7000
Xilinx CoolRunner™/CoolRunner-II CPLDs
Xilinx Platform Flash ISP configuration PROMs
Selected third-party SPI PROMs
Selected third-party BPI PROMs
Target Devices Not Supported
Xilinx 9500/9500XL CPLDs
Xilinx 1700 and 18V00 ISP configuration PROMs
Xilinx FPGA eFUSE programming
Supplied with
USB cable
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€ 77.31
Each (ex VAT)
€ 92.00
Each (inc. VAT)
1
€ 77.31
Each (ex VAT)
€ 92.00
Each (inc. VAT)
1
Buy in bulk
quantity | Unit price |
---|---|
1 - 4 | € 77.31 |
5 - 9 | € 74.58 |
10+ | € 73.30 |
Technical Document
Specifications
Product details
JTAG-HS3 FPGA Programming Cable
The JTAG-HS3 programming cable allows high-speed programming/debugging of Xilinx FPGA and SoC devices from a host PC.
Features
Separate Vref drives JTAG signal voltages
Vref can be any voltage between +1.8V and +5V
USB 2.0 HS port drives JTAG bus at up to 30Mbit/sec
Compatible with Xilinx ISE 14.1 and newer
Compatible with Xilinx Vivado 2013.3 and newer
PC connector: MicroUSB
JTAG connector: 2 x 7-pin 2mm
Open-drain buffer on pin 14 allows processor reset of Xilinx Zynq platform
Supported Target Devices
Xilinx FPGAs
Xilinx Zynq-7000
Xilinx CoolRunner™/CoolRunner-II CPLDs
Xilinx Platform Flash ISP configuration PROMs
Selected third-party SPI PROMs
Selected third-party BPI PROMs
Target Devices Not Supported
Xilinx 9500/9500XL CPLDs
Xilinx 1700 and 18V00 ISP configuration PROMs
Xilinx FPGA eFUSE programming
Supplied with
USB cable