Si5347A-A-GM, Frequency Multiplier 4, 0.0001 → 712.5 MHz, 64-Pin QFN
Technical Document
Specifications
Brand
Silicon LabsMaximum Output Frequency
712.5MHz
Number of Elements per Chip
4
Mounting Type
Surface Mount
Minimum Output Frequency
0.0001MHz
Package Type
QFN
Maximum Supply Current
240 mA
Pin Count
64
Maximum Input Frequency
750MHz
Dimensions
9 x 9 x 0.85mm
Height
0.85mm
Length
9mm
Maximum Operating Supply Voltage
3.47 V
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
3.14 V
Minimum Operating Temperature
-40 °C
Width
9mm
Country of Origin
United States
Product details
Si5346 Si5347 Dual/Quad DSPLL Clock Multipliers
These jitter attenuating clock multipliers combine either two or four DSPLL and provide access to any of the four inputs and provide low jitter clocks on any of the outputs.
The Silicon Labs Si5346 has two DSPLL and housed in a 44-Pin QFN package (7x7mm)
The Silicon Labs Si5347 has four DSPLL and housed in a 64-Pin QFN package (9x9mm)
- Each DSPLL generates any output frequency from any input frequency.
- Input frequency range:
- Differential: 8 kHz to 750MHz
- LVCMOS: 8 kHz to 250MHz
- Output frequency range:
- Differential: up to 712.5MHz
- LVCMOS: up to 250MHz
- Ultra low jitter - less than 100 fs typical (12kHz-20MHz)
- Configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML and HCSL with programmable signal amplitude.
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P.O.A.
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P.O.A.
1
Ideate. Create. Collaborate
JOIN FOR FREE
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Technical Document
Specifications
Brand
Silicon LabsMaximum Output Frequency
712.5MHz
Number of Elements per Chip
4
Mounting Type
Surface Mount
Minimum Output Frequency
0.0001MHz
Package Type
QFN
Maximum Supply Current
240 mA
Pin Count
64
Maximum Input Frequency
750MHz
Dimensions
9 x 9 x 0.85mm
Height
0.85mm
Length
9mm
Maximum Operating Supply Voltage
3.47 V
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
3.14 V
Minimum Operating Temperature
-40 °C
Width
9mm
Country of Origin
United States
Product details
Si5346 Si5347 Dual/Quad DSPLL Clock Multipliers
These jitter attenuating clock multipliers combine either two or four DSPLL and provide access to any of the four inputs and provide low jitter clocks on any of the outputs.
The Silicon Labs Si5346 has two DSPLL and housed in a 44-Pin QFN package (7x7mm)
The Silicon Labs Si5347 has four DSPLL and housed in a 64-Pin QFN package (9x9mm)
- Each DSPLL generates any output frequency from any input frequency.
- Input frequency range:
- Differential: 8 kHz to 750MHz
- LVCMOS: 8 kHz to 250MHz
- Output frequency range:
- Differential: up to 712.5MHz
- LVCMOS: up to 250MHz
- Ultra low jitter - less than 100 fs typical (12kHz-20MHz)
- Configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML and HCSL with programmable signal amplitude.
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products